Floating-point Mathematics IP Cores

Zipcores Floating-point Mathematics IP Cores are provided as native VHDL source code and are compatible with a wide range of FPGA, SoC, and ASIC technologies. ZipCores Floating-point IPs are compatible with standard IEEE 754 arithmetic. The Floating-point portfolio includes cores for all common floating-point operations, including multiply, divide, add/subtract, square-root, and conversion between floating-point formats. All the IPs are fully pipelined with very low latency. Floating-point Mathematics IP Cores are ideal for high-speed, high-throughput mathematical operations.

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Zipcores Utvecklingsprogramvara Floating-point Multiplier
Datablad
Digital leverans
Min.: 1
Multipla: 1
IP Core - Floating-point Multiplier
Zipcores Utvecklingsprogramvara Floating-point Adder
Datablad
Digital leverans
Min.: 1
Multipla: 1
IP Core - Floating-point Adder
Zipcores Utvecklingsprogramvara Floating-point to fixed-point converter
Datablad
Digital leverans
Min.: 1
Multipla: 1
IP Core - Floating-point to Fixed-point
Zipcores Utvecklingsprogramvara Fixed-point to floating-point converter
Datablad
Digital leverans
Min.: 1
Multipla: 1
IP Core - Fixed-point to Floating-point
Zipcores Utvecklingsprogramvara Floating-point Divider
Datablad
Digital leverans
Min.: 1
Multipla: 1
IP Core - Floating-point Divider
Zipcores Utvecklingsprogramvara Floating-point Square-root
Datablad
Digital leverans
Min.: 1
Multipla: 1
IP Core - Floating-point Square-root