GS81314LQ18GK-106

GSI Technology
464-GS81314LQ18GK106
GS81314LQ18GK-106

Tillverk:

Beskrivning:
SRAM 1.2/1.25V 8M x 18 144M

ECAD-modell:
Ladda ned den kostnadsfria Libary Loader för att omvandla denna fil för ditt ECAD-verktyg. Läs mer om ECAD-modellen.

Tillgänglighet

Lager:
Ej på lager
Minst: 10   Flera: 10
Enhetspris:
-,-- kr
Ext. pris:
-,-- kr
Est. Pris:
Denna produkt levereras UTAN KOSTNAD

Prissättning (SEK)

Antal Enhetspris
Ext. pris
4 831,27 kr 48 312,70 kr

Produktattribut Attributvärde Välj attribut
GSI Technology
Produktkategori: SRAM
RoHS-direktivet:  
144 Mbit
8 M x 18
1.066 GHz
Parallel
1.35 V
1.2 V
2.3 A
0 C
+ 85 C
SMD/SMT
BGA-260
Tray
Märke: GSI Technology
Monteringsland: Not Available
Distributionsland: Not Available
Ursprungsland: Not Available
Minnestyp: QDR-IVe
Fuktkänsliga: Yes
Produkttyp: SRAM
Serie: GS81314LQ18GK
Fabriksförpackningskvantitet: 10
Underkategori: Memory & Data Storage
Handelsnamn: SigmaQuad-IVe
Typ: SigmaQuad-IVe B2
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Attribut som valts: 0

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TARIC:
8542324500
CNHTS:
8542319090
CAHTS:
8542320041
USHTS:
8542320041
JPHTS:
854232029
KRHTS:
8542321020
MXHTS:
8542320201
ECCN:
3A991.b.2.b

SigmaQuad-IVe ECCRAMs

GSI Technology SigmaQuad-IVe ECCRAMs are the Separate I/O half of the SigmaQuad-IVe/SigmaDDR-IVe family of high performance ECCRAMs. The devices are similar to GSI's third generation of networking SRAMs but offer several new features that help enable significantly higher performance. GSI's ECCRAMs implement an ECC algorithm that detects and corrects all single-bit memory errors, including those induced by SER events. These events include cosmic rays, alpha particles, etc. The resulting Soft Error Rate of these devices is anticipated to be <0.002 FITs/Mb. A 5-order-of-magnitude improvement over comparable SRAMs with no on-chip ECC, which typically have an SER of 200FITs/Mb or more.

Quad SRAMs

GSI Technology Quad SRAMs combine capacity and performance with the ability to transfer four beats of data (two beats per data bus) in a single clock cycle. SigmaQuad SRAMs are synchronous memories with separate read and write data buses with unequaled transaction rates by competitors.